In liquid crystal displays (hereinafter LCDs), liquid crystal material is sandwiched between a pair of substrates. FIG. 5 is an enlarged plain view of one of the substrates. On the substrate, pixel electrodes 15 are arranged in a matrix like manner of rows and columns as shown in FIG. 5. Furthermore, a switching device is provided for each pixel electrode to selectively apply voltage to the pixel electrode. Usually, a thin film transistor (hereinafter TFT) 17 is used as the switching device. Therefore, this substrate is called “a TFT array substrate”. On the TFT array substrate, gate lines 2 and source lines 9 are provided to supply electric signals to respective TFTs 17. When the TFT turns “ON” by applying a signal to the gate line 2, voltage on the source line 9 is written into the pixel electrode 15. The other substrate, which is often called “a counter substrate”, has a counter electrode formed thereon. Accordingly, liquid crystal interposed between the counter electrode and the pixel electrode is driven by potential difference between the electrodes, thereby obtaining any required display.
In FIG. 4, a plain view of the whole TFT array substrates is shown. The pixel electrodes 15 and the TFTs 17 are provided in a display area 22, and terminal forming regions 20, 21, in which terminals are formed, are provided around the display area 22. In the regions 20, 21, source terminals 18 and gate terminals 19 are formed respectively. The source terminal 18 is connected to the source line 9 in the display area 22. The gate terminal 19 is connected to the gate line 2 in the display area 22.
In order to protect the TFTs 17 from destruction by, for example, electrostatic discharge during fabrication process, the source terminals 18 and the gate terminal 19 are connected to a short-circuit ring 23. At the final stage of the fabrication process, the short-circuit ring 23 is removed by cutting off the edge of the TFT array substrate. Thereafter, wirings from external signal source are attached to the source terminals 18 and the gate terminals 19, therefore fabrication of LCD is completed.
Hereinafter, fabrication process of the TFT array substrate is described with referring to FIGS. 6, 7 and 8. FIGS. 6 and 7 are cross sectional view of the TFT array substrate showing a TFT and a source terminal formed thereon, and describing fabrication steps thereof. FIG. 8 is a magnified view of the source terminal 18 in FIG. 7(c). FIG. 8(a) is a plain view of the source terminal 18, and FIG. 8(b) is a cross sectional view taken along line B-B in FIG. 8(a).
In the figure, a transparent insulating substrate 1, such as a glass substrate, is shown. Of course, a simply insulating substrate is also applicable. On the substrate 1, a gate line 2 is formed. The gate line 2 is made from a metal film such as a film of Al or Cr. On the gate line 2 and covering the substrate 1, a gate insulating layer 4 is formed. The gate insulating layer 4 is made of silicon nitride.
Above the gate line 2 and interposing the gate insulating layer 4, a semiconductor layer 5 is formed. The semiconductor layer 5 is made from, for example, a film of amorphous silicon. On the semiconductor layer 5, a contact layer 6 is formed. The contact layer 6 is made from a film of n+ amorphous silicon. On the contact layer 6, a source electrode 7 and a drain electrode 8 are formed. With the source electrode 7 and the drain electrode 8, a source line 9 is formed at the same time. By etching the contact layer 6 partly, a channel 10 of the TFT is formed. Not to expose the TFT 17, a passivation film 11 is formed. The passivation film 11 is made of silicon nitride.
On the drain electrode 8 and through the passivation film 11, a contact hole 12 is formed for connecting the drain electrode 8 with a pixel electrode 15. On the source line 9 and through the passivation film 11, a contact hole 13 is formed for connecting the source line 9 with a terminal electrode 16. The pixel electrode 15 is made from a film of indium tin oxide (ITO). With the pixel electrode 15, the terminal electrode 16 is formed from the same ITO film at the same time.
Hereinafter, fabrication process of the TFT array substrate is described more in detail with referring to FIGS. 6, 7 and 8.
First of all, a metal film, such as a film of Cr or Al, is formed on an insulating substrate 1 by sputtering method. Then, the film is patterned using photo resist through photolithography to form a gate line 2 (FIG. 6(a)).
Thereafter, a silicon nitride film as a gate insulating layer 4 is deposited onto the substrate 1 with the gate line 2, by a plasma CVD method (FIG. 6(b)). Further, an amorphous silicon film is formed thereon, and successively, a n+ amorphous silicon film in which impurities are doped is formed. Then, the amorphous silicon film and the n+ amorphous silicon film are simultaneously patterned using photo resist through photolithography to form a semiconductor layer 5 and the contact layer 6 of TFT above the gate line 2 (FIG. 6(c)).
Afterwards, a metal film such as Cr film or Al film is formed by a method such as sputtering. Then, the film is patterned using photo resist through photolithography to form a source electrode 7, drain electrode 8 and source line 9. Thereafter, the n+ amorphous silicon (contact layer 6) is partly etched, that is, an area on which neither the source electrode 7 nor the drain electrode 8 is formed is etched through dry-etching process, so that the channel 10 is formed (FIG. 7(a)).
Then, to provide protection for TFTs, a silicon nitride film as a passivation film 11 is deposited by a method such as plasma CVD. Thereafter, through dry-etching process using photo resist by photolithography, contact holes 12 and 13 are formed (FIG. 7(b)). As described above, the contact hole 12 is for connecting the drain electrode 8 with a pixel electrode 15, and the contact hole 13 is for connecting the source line 9 with a terminal electrode 16.
Afterwards, a transparent conductive film such as an ITO film is formed by a method such as sputtering. Then, the film is patterned using photo resist through photolithography, so that the pixel electrode 15 and the terminal electrode 16 are formed simultaneously. As described above, the terminal electrode 16 is for connection to external signal source.
For the TFT array substrate thus fabricated, an enlarged view around the source terminal 18 is shown in FIG. 8. As described above, the terminal electrode 16 is positioned as the uppermost layer of the source terminal 18 for external connection. The terminal electrode 16 is also connected to the source line 9 via the contact hole 13 and an end of the source line 9 is connected to the source electrode 7 of the TFT 17, that is, internal connection. In the meantime, the other end of the source line 9 is connected to the short-circuit ring 23 (see FIG. 4).
At the final stage of the fabrication, the edge of the TFT array substrate is cut off and chamfered off along the line 24 to remove the short-circuit ring 23. However, especially when the edge of the substrate is chamfered, the source line 9 can be peeled off. The peeled metal pieces may contact each other to electrically connect the adjacent terminals, so that a problem of short-circuit between adjacent lines can be caused. Moreover, in case where the cutting line 24 is designed to be closer to the terminal electrode, or in case where the cutting line 24 is accidentally closed to the terminal electrode due to inaccuracy of manufacturing equipment, the peeled metal piece may contact with the terminal electrode of the adjacent terminal to cause a problem of short-circuit between adjacent lines.
As is already described above and as shown in FIG. 8, a single metallic layer is arranged below the terminal electrode 16 at the source terminal 18, in the conventional TFT array substrate. Namely, both the display area side (the right side in FIG. 8) and the short-circuit ring side (the left side in FIG. 8), the same metallic layer, that is, the source line 9 is arranged below the terminal electrode 16.
In this conventional structure, when the substrate is chamfered along the cutting line 24, the source line 9 at the edge is easily exfoliated to appear as a peeled metal piece. Therefore, since the peeled metal pieces easily contact each other to cause short-circuit between neighboring terminals, short-circuit between neighboring lines frequently occurs. Furthermore, the peeled metal piece easily contacts with the terminal electrode of the neighboring terminal and causes short-circuit between neighboring lines.